RISC-V at Embedded World 2022 has ended

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RISC-V at Embedded World 2022

Visit us in Hall 1, Booth 1-550.
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10:00am CEST

Introduction to RISC-V Processor Verification - Larry Lapides, Imperas Software Ltd Hall 1, Booth #1-550

10:30am CEST

Introducing SiFive Vector Processor Portfolio - Andrew Frame, SiFive Hall 1, Booth #1-550

11:00am CEST

The Next Step in Low Energy Edge DSP and AI - Martin Croome, GreenWaves Technologies Hall 1, Booth #1-550

11:30am CEST

Customizing RISC-V Cores to Accelerate Neural Networks - Jon Taylor, Codasip Hall 1, Booth #1-550

12:00pm CEST

Ubuntu Core: A Secured Embedded Linux Distribution for RISC-V - Ondrej Kubik, Canonical Hall 1, Booth #1-550

12:30pm CEST

Break

1:00pm CEST

RISC-V and Functional Safety - Florian Wohlrab, Andes Technology Hall 1, Booth #1-550

1:30pm CEST

OpenHW CORE-V MCU DevKit for Cloud Connected IoT - Rick O'Connor, OpenHW Group Hall 1, Booth #1-550

2:00pm CEST

Open Acceleration for RISC-V – Portability, Performance and Partners Achieved with SYCL Instead of CUDA - Charles Macfarlane, Codeplay Hall 1, Booth #1-550

2:30pm CEST

NOEL-V, a Configurable 32-Bit and 64-bit RISC-V IP - Christian Sayer, Cobham Gaisler Hall 1, Booth #1-550

3:00pm CEST

Remote Development with SCRx-based SDK - Hugo Décharnes, Syntacore Hall 1, Booth #1-550

3:30pm CEST

Thermal (IR) Imaging Camera including ISP on Polarfire RISC-V FPGA SoC - S Thomas, Digital Core Technologies Hall 1, Booth #1-550