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Tuesday, June 21 • 2:30pm - 2:45pm
NOEL-V, a Configurable 32-Bit and 64-bit RISC-V IP - Christian Sayer, Cobham Gaisler

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NOEL-V is a is a RISC-V processor model that can be implemented in various configurations ranging from RV32I to RCV64GC. The NOEL-V processor has been developed by the CAES Gaisler Products group, with a long heritage of supplying processor implementations - both as IP cores for general licensing, as well as radiation-tolerant standard products for space applications. The NOEL-V processor was initially released for general applications in 2019. A more recent addition to the core is the fault tolerant (FT) feature for high-reliability and space applications, which has heritage in numerous previous processor generations. Along with the introduction of the NOEL-V IP, the presentation will describe the first implementations from a single-core testchip to the GR7xV development, a 16-core NOEL-V based processor targeted towards space applications. Furthermore, the ongoing evolution of the IP is demonstrated e.g. in terms of support for different extensions of the RISC-V ISA and the resulting impact on parameters such as implementation complexity.

Speakers
avatar for Christian Sayer

Christian Sayer

Field Applications Engineer, Cobham Gaisler
Christian Sayer joined the Gaisler division of CAES as Field Applications Engineer in 2013. His focus is on IP and standard products in the processor, memory, interface, mixed signal and power domains. Prior to CAES, Mr. Sayer worked as design and applications engineer in fabless... Read More →



Tuesday June 21, 2022 2:30pm - 2:45pm CEST
Hall 1, Booth #1-550
  Demo
  • Slides Attached Yes